AN802 vishay siliconix document number: 70592 30-nov-92 www.vishay.com faxback 408-970-5600 1 low-voltage motor drive designs using n-channel dual mosfets in surface-mount packages two basic mosfet configurations are used in low-voltage motor drivesethe n-channel half-bridge and the p- and n-channel (complementary) half-bridge. the main advantage of the complementary approach is the simplicity of its gate-drive circuitry, as discussed in vishay siliconix application note an90-4. when an n-channel mosfet is used for the high-side (or auppero) switch, the gate drive signal requires level shifting, resulting in increased complexity and cost. but n-channel power mosfets are more efficient than p-channel mosfets in terms of r ds(on) vs. die area. this efficiency translates into lower cost, smaller die size for a given current and voltage, and the minimum r ds(on) that can fit in a given package. for both vertical and lateral transistors, n-material has better carrier mobility than p-material. further exaggerating the disparity is the fact that most power ic processes have been optimized for n-channel devices; thus, the processes yield even less area-efficient p-channel mosfets. for a given r ds(on) and breakdown voltage rating, a p-channel power mosfet can easily be 2.5 to 4 times the area of a comparable n-channel device. for applications where the n-channel half-bridge configuration is preferred, vishay siliconix offers the si9940, si9955dy, si9956dy, and si9959dy. each contains two electrically isolated, low r ds(on) , n-channel mosfets in an 8-pin soic package. when the trade-offs have been carefully weighed and system efficiency dictates use of an n-channel bridge, several options remain in selecting the optimum isolated power supply and gate-drive level-shifting techniques for the application. 5-v applications in figure 1, a charge-pump circuit is used to boost the 5-v supply (actually 4.5-v minimum) to a voltage sufficient to drive both the upper and lower mosfet gates directly. horizontal scale: 5 s/div 1 mhz osc 5 v 10% 12 to 16 v cmos level transla- tion figure 1. 5-volt, 3-phase motor drive a b c a c b vertical scale: 5 v/div
AN802 vishay siliconix www.vishay.com faxback 408-970-5600 2 document number: 70592 30-nov-92 voltage rating for the lower n-channel device and provides at least 7.5 v of gate enhancement for the upper n-channel mosfet. driving all of the gates arail-to-railo given the input level variations (4.5 to 5.5 v) and the charge pump's losses, the resulting supply voltage will range from approximately 12 to 16 v. this voltage range is safely within the 20-v absolute maximum gate-source results in a slightly lower impedance in the lower devices. in motor drives, however, the total impedance (one upper mosfet plus one lower mosfet) is usually more important than symmetry. directly driving both the upper and lower gates from a common voltage, as illustrated in figure 1, not only eliminates the need for an intermediate voltage supply but also removes the need for isolation between the supplies used to drive the three upper n-channels. 12-v applications intermediate low-voltage applications (around 12 v) can be simplified greatly if a dynamic gate-drive technique is acceptable. the bootstrap capacitor arrangement is a simple and inexpensive method of providing the necessary voltage to drive the high-side gates (figure 2). within a relatively narrow voltage range (about 10 to 20 v), a simple passive pull-up (r1) value can be selected to provide fast transition rates with tolerable switching losses. for operation above 20 v, it may be necessary to incorporate an active pull-up level-shift arrangement, and the gate-source of q2 should be clamped with a zener diode to guarantee that the absolute maximum v gs rating is not violated. operation below about 10 v could result in an insufficient q2 gate-drive with this technique. the voltage stored in the bootstrap capacitor is the 10 v (supply voltage) minus a diode drop and minus the mosfet voltage drop (load current x r ds(on) across q1). this voltage is further reduced by the charge which must be transferred to fully enhance the gate of q2, and the voltage decays over time by leakage current through d1 and q3. in figure 2 the inputs of the lower mosfet (q1) and the level-shift mosfet (q3) are tied together. a bootstrap arrangement does not completely eliminate use of a commutation or modulation sequence that turns both output devices off, and it is absolutely necessary that q1 be turned on to recharge the bootstrap capacitor prior to turning on q2. q2 cannot be held on indefinitely, and the inherently adynamico nature of the bootstrap arrangement renders it unusable in some motor drive applications. but for many others it can provide a technically acceptable and highly cost-effective solution. to understand the operation of the circuit shown in figure 2, it is best to begin with the input high and both q1 and q3 turned on. q3 pulls the gate of mosfet q2 to ground, turning it off, and q1 (aside from driving the output low) provides a ground return for recharging the bootstrap capacitor to 12 v (minus the diode drop of d1 and the v ds(on) of q1). when the input goes low, both q1 and q3 are turned off. this allows resistor r1 to pull q2's gate high. initially, q2's gate charging current is drawn directly from the 12-v supply (via r1). when q2's gate-source voltage exceeds its v th (threshold voltage), it begins to turn on, pulling the half-bridge output (and the bottom end of the bootstrap capacitor) toward the upper rail. as the half-bridge output goes high, diode d1 is reverse biased, allowing the bootstrap capacitor voltage to level-shift above the 12-v supply. a bootstrap capacitor value approximately ten times greater than the effective capacitance of q2 allows it to be fully enhanced without sacrificing more than 10% of the bootstrap's initial voltage charge. r2 has been added in series with q1's gate to slow its turn-on rate, while d2 provides a lower gate-drive impedance to allow a rapid turn-off rate. turning off both q1 and q2 quickly and turning them on at a reduced rate minimizes shoot-through current during transitions. although the leakage current through d1 and q3 is extremely low, if q2 is left on without some method of replenishing the lost charge, the bootstrap capacitor voltage will eventually collapse. as the bootstrap capacitor voltage depletes, the enhancement voltage of q2 is reduced. this increases q2's on-resistance and power dissipation to potentially damaging levels. 12- to 36-v applications a simple, minimum component charge-pump circuit can provide static operation and tolerable switching times for medium-voltage applications. the charge-pump circuit demonstrated in figure 3 has been reduced to the smallest number of components and assumes a system 12-v supply can be used to drive the ground-referenced mosfet gates and the oscillator. an oscillator frequency much higher than the desired switching frequency will charge the high-side mosfet gate in minimal time with a small charge-pump capacitance (c1). in this example, to achieve a 20-khz switching frequency with tolerable switching losses, a 2-mhz oscillator and a 0.001- f charge-pump capacitor were chosen to obtain an output rise time of 500 ns.
AN802 vishay siliconix document number: 70592 30-nov-92 www.vishay.com faxback 408-970-5600 3 d1 output q2 q1 q3 d2 r2 c1 r1 +12 v q1, q2: si9956dy or si9959dy q3: 2n7000 (vishay siliconix) d1, d2: 1n4148 (telefunken) r1, r2: 200 c1: 0.001 f a b c d a b c d input vertical scale: 5 v/div horizontal scale: 5 s/div figure 2. 12-volt motor drive q1 osc q3 q2 v motor output d1 d2 c1 d1, d2: 1n4148 (telefunken) c1: 0.001 f q1, q2: si9955dy or si9959dy q3: 2n7002 (vishay siliconix) a b a b input +12 v vertical scale: 5 v/div horizontal scale: 5 s/div figure 3. 12- to 36-volt motor drive
AN802 vishay siliconix www.vishay.com faxback 408-970-5600 4 document number: 70592 30-nov-92 turning off a mosfet with a charge-pump gate drive can also contribute significantly to switching losses unless some method is provided to ashunto the gate charge. traditionally this has been accomplished by providing a passive resistance between the mosfet's gate and source. thus the gate charge is drained off when the oscillator is disabled. the additional load on the charge-pump usually leads to a series of trade-offs concluding with marginal (at best) turn-on and turn-off rates. aside from the usual switching losses, the turn-off time of the upper mosfet is somewhat critical, as the turn-on signal to the lower mosfet must be offset by a corresponding dead time to avoid simultaneous conduction (crossover current). at low voltages, a mosfet such as the 2n7002 (q3) can be used to simply acrow-baro the upper mosfet's gate charge to ground when the lower output mosfet is turned on. the circuit in figure 3 is intended for use at low voltages (less than the 50-v v (br)dss rating of the si9955dy); thus, no current-limiting (for q3) and no additional gate protection has been added to prevent the upper mosfet's gate from being pulled more than 20 v below the source. since the 2n7002 and the lower output mosfet (of the si9955dy) have compatible threshold voltages (v th ), and since their gates are tied together, the gate-source is inherently protected against overvoltage under all normal operating conditions, and crossover current is minimized. increased efficiency could be achieved by disabling the oscillator when the half-bridge output is switched low. drain pull-up pull-down drain pull-up pull-down motor cmos logic vn50300 input input d1 r3 c1 r2 q1 c2 r4 r1 r1' r3' c1' r2' q1' q2 c4 c3 osc c2 = bootstrap cap c3 = charge-pump cap v dd (12 to 15 v) v dd v ds v ds i sense i sense v dd v ss r5 figure 4. si9910dy adaptive mosfet gate driver
AN802 vishay siliconix document number: 70592 30-nov-92 www.vishay.com faxback 408-970-5600 5 si9910dy adaptive mosfet gate driver the si9910dy adaptive mosfet gate driver (figure 4) provides a third method of driving dual n-channel half-bridges. although designed to drive mosfets at much higher power levels, the si9910 has proven to be an extremely cost-effective solution for low-power systems (compared to the discrete solutions). unique among integrated mosfet gate drivers, the si9910 provides low output impedance while drawing less than 1 a of supply current when on (output high). this allows the driver to be referenced to the source of the high-side switch and powered by either a bootstrap capacitor, a charge-pump, or a combination of both. combining the si9910 with the high peak-current capability of the bootstrap capacitor allows rapid, highly efficient transition rates. the addition of a small charge-pump will overcome the on-state leakage losses, providing continuous (static) operation of the high-side output device. the si9910 also provides a means for di/dt, dv/dt, and shoot-through current control as well as undervoltage and catastrophic current protection. details of the si9910's operation can be found in the vishay siliconix power products data book and in application note an89-5. the si9910dy in the small-outline (so-8) package provides assembly compatibility with the si9955dy, si9956dy and si9959dy n-channel half-bridges in so-8 packages. summary although the n-channel power mosfet half-bridge requires a somewhat more complex gate-drive arrangement for the high-side device, it offers r ds(on) advantages which extend the power range of surface-mount power devices. with the selection of a high-side gate-drive circuit that complements an application's needs, the n-channel half-bridge can provide a surface-mount compatible option that is economical and reliable. when using n-channel half-bridges in motor drives, the commutation and modulation switching sequences and the operating-voltage range must be considered to select the optimum high-side gate-drive circuit. the problem to be solved is how to drive the gate of the upper n-channel mosfet above the half-bridge supply voltage to fully enhance the device. the si9955dy, si9956dy, and si9959dy exhibit good r ds(on) characteristics with only 4.5 v of gate enhancement, and the efficiency of these half-bridges in 5-v applications is further improved by the use of a circuit that increases gate-drive voltage for the lower mosfet and provides sufficient voltage to enhance the upper device. as shown in figure 1, the generation of a higher voltage to drive both the upper and lower gates does not necessitate circuits of undue expense or complexity. with intermediate and higher voltage drives (above 5 v), sufficient voltage exists to fully enhance the power mosfets' gates, and the problem becomes that of level-shifting the gate drive to the high-side device without violating its absolute maximum gate-source voltage. figures 2 and 3 show just two of the many solutions available which are based on the inexpensive bootstrap and/or charge-pump isolated supply techniques. both the bootstrap and charge pump have inherent characteristics which restrict their use to compatible drive sequences. although a charge pump provides a method of direct, continuous, high-side gate drive, it usually results in slower transition rates. bootstrap circuits provide a floating supply that allows considerable peak gate-charging current and thus, very rapid transition rates e but this occurs at the expense of static operation. combining the best of both the charge-pump and bootstrap circuits, the si9910 offers an inexpensive, surface-mount solution with minimal parts count, providing both efficient transition rates and static operation. in addition, it offers control and protection measures that facilitate design of reliable, efficient motor drives.
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